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MEMOCODE
2010
IEEE
15 years 4 months ago
Proving transaction and system-level properties of untimed SystemC TLM designs
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
Daniel Große, Hoang M. Le, Rolf Drechsler
PADL
2010
Springer
16 years 3 months ago
Implementing Query Answering for Hybrid MKNF Knowledge Bases
Abstract. Ontologies and rules are usually loosely coupled in knowledge representation formalisms. In fact, ontologies use open-world reasoning while the leading semantics for rule...
Ana Sofia Gomes, José Júlio Alferes,...
ECBS
2010
IEEE
224views Hardware» more  ECBS 2010»
16 years 1 months ago
Timed Automata Model for Component-Based Real-Time Systems
—One of the key challenges in modern real-time embedded systems is safe composition of different software components. Formal verification techniques provide the means for design...
Georgiana Macariu, Vladimir Cretu
FM
2009
Springer
124views Formal Methods» more  FM 2009»
16 years 1 months ago
Reasoning about Memory Layouts
Verification methods for memory-manipulating C programs need to address not only well-typed programs that respect invariants such as the split heap memory model, but also programs...
Holger Gast
CAV
2007
Springer
129views Hardware» more  CAV 2007»
16 years 27 days ago
BAT: The Bit-Level Analysis Tool
Abstract. While effective methods for bit-level verification of low-level properties exist, system-level properties that entail reasoning about a significant part of the design p...
Panagiotis Manolios, Sudarshan K. Srinivasan, Daro...