We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
The goal of this paper is to model an agent who dislikes large choice sets because of the “cost of thinking” involved in choosing from them. We take as a primitive a preferenc...
This article presents a rational model developed under the distributed cognition framework that explains how social tags influence knowledge acquisition and adaptation in explorat...
When integrating dierent system components, the interaction between dierent features is often error prone. Typically errors occur on interruption, concurrency or disabling/ enabli...