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ECBS
2007
IEEE
145views Hardware» more  ECBS 2007»
15 years 10 months ago
Automatic Verification and Performance Analysis of Time-Constrained SysML Activity Diagrams
We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
FMCAD
2007
Springer
15 years 10 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
IUI
1993
ACM
15 years 11 months ago
The price of flexibility
The goal of this paper is to model an agent who dislikes large choice sets because of the “cost of thinking” involved in choosing from them. We take as a primitive a preferenc...
David D. Woods
CSCW
2008
ACM
15 years 8 months ago
The microstructures of social tagging: a rational model
This article presents a rational model developed under the distributed cognition framework that explains how social tags influence knowledge acquisition and adaptation in explorat...
Wai-Tat Fu
AMOST
2007
ACM
15 years 10 months ago
Combining test case generation for component and integration testing
When integrating dierent system components, the interaction between dierent features is often error prone. Typically errors occur on interruption, concurrency or disabling/ enabli...
Sebastian Benz