5255 search results - page 832 / 1051 » Formal Methods for Privacy |
139
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ICCAD
1996
IEEE
15 years 10 months ago
1996
IEEE
This paper presents a new framework for formal logic verification. What is depicted here is fundamentally different from previous approaches. In earlier approaches, the circuit is ...
185
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FMCAD
2004
Springer
15 years 10 months ago
2004
Springer
This work presents a memory-efficient All-SAT engine which, given a propositional formula over sets of important and non-important variables, returns the set of all the assignments...
193
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FMICS
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
164
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FORMATS
2006
Springer
15 years 10 months ago
2006
Springer
We consider interval measurement logic IML, a sublogic of Zhou and Hansen's interval logic, with measurement functions which provide real-valued measurement of some aspect of ...
175
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SAS
2000
Springer
15 years 10 months ago
2000
Springer
As compilers increasingly rely on optimizations to achieve high performance, the effectiveness of source level debuggers for optimized code continues to falter. Even if values of s...