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ICANN
2009
Springer
16 years 1 months ago
Evolving Memory Cell Structures for Sequence Learning
The best recent supervised sequence learning methods use gradient descent to train networks of miniature nets called memory cells. The most popular cell structure seems somewhat ar...
Justin Bayer, Daan Wierstra, Julian Togelius, J&uu...
SCCC
2008
IEEE
16 years 1 months ago
Hardware Synthesis for Asynchronous Communications Mechanisms
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed concurrent processes. In this work an automatic meth...
Kyller Costa Gorgônio, Jordi Cortadella
CAV
2007
Springer
129views Hardware» more  CAV 2007»
16 years 1 months ago
BAT: The Bit-Level Analysis Tool
Abstract. While effective methods for bit-level verification of low-level properties exist, system-level properties that entail reasoning about a significant part of the design p...
Panagiotis Manolios, Sudarshan K. Srinivasan, Daro...
MEMOCODE
2005
IEEE
16 years 12 days ago
PyPBS design and methodologies
This paper presents results on processor specification from a specialized high-level finite state machine (FSM) language. The language is an extension and enhancement of earlier...
Greg Hoover, Forrest Brewer
MEMOCODE
2005
IEEE
16 years 12 days ago
Synthesis of synchronous assertions with guarded atomic actions
The SystemVerilog standard introduces SystemVerilog Assertions (SVA), a synchronous assertion package based on the temporal-logic semantics of PSL. Traditionally assertions are ch...
Michael Pellauer, Mieszko Lis, Don Baltus, Rishiyu...