3045 search results - page 480 / 609 » Formal Approaches to Software Architecture |
171
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VMCAI
2005
Springer
16 years 1 days ago
2005
Springer
When a system fails to satisfy its specification, the model checker produces an error trace (or counter-example) that demonstrates an undesirable behavior, which is then used in d...
187
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SIGSOFT
2010
ACM
15 years 4 months ago
2010
ACM
Interest in Graphical Processing Units (GPUs) is skyrocketing due to their potential to yield spectacular performance on many important computing applications. Unfortunately, writ...
197
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SIGSOFT
2007
ACM
16 years 7 months ago
2007
ACM
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
153
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VMCAI
2009
Springer
16 years 1 months ago
2009
Springer
Abstract. Because of its critical importance underlying all other software, lowlevel system software is among the most important targets for formal verification. Low-level systems...
164
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ISSTA
2009
ACM
16 years 1 months ago
2009
ACM
Many automatic testing, analysis, and verification techniques for programs can be effectively reduced to a constraint-generation phase followed by a constraint-solving phase. Th...