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IJNS
2000
130views more  IJNS 2000»
15 years 6 months ago
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach ...
Teresa Serrano-Gotarredona, Andreas G. Andreou, Be...
ICRA
2010
IEEE
116views Robotics» more  ICRA 2010»
15 years 5 months ago
Learning visibility of landmarks for vision-based localization
— We aim to perform robust and fast vision-based localization using a pre-existing large map of the scene. A key step in localization is associating the features extracted from t...
Pablo Fernández Alcantarilla, Sang Min Oh, ...
VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
16 years 6 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
CIDR
2007
156views Algorithms» more  CIDR 2007»
15 years 7 months ago
SwissQM: Next Generation Data Processing in Sensor Networks
Sensor networks are becoming an important part of the IT landscape. Existing systems, however, are limited in two fundamental ways: lack of data independence, and poor integration...
René Müller, Gustavo Alonso, Donald Ko...
DAC
1995
ACM
15 years 10 months ago
Automatic Clock Abstraction from Sequential Circuits
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
Samir Jain, Randal E. Bryant, Alok Jain