Sciweavers

7047 search results - page 1218 / 1410
» Focusing on Binding and Computation
Sort
View
HPCA
2008
IEEE
16 years 6 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
HPCA
2006
IEEE
16 years 6 months ago
DMA-aware memory energy management
As increasingly larger memories are used to bridge the widening gap between processor and disk speeds, main memory energy consumption is becoming increasingly dominant. Even thoug...
Vivek Pandey, Weihang Jiang, Yuanyuan Zhou, Ricard...
HPCA
2005
IEEE
16 years 6 months ago
Tapping ZettaRAMTM for Low-Power Memory Systems
ZettaRAMTM is a new memory technology under development by ZettaCoreTM as a potential replacement for conventional DRAM. The key innovation is replacing the conventional capacitor...
Ravi K. Venkatesan, Ahmed S. Al-Zawawi, Eric Roten...
HPCA
2003
IEEE
16 years 6 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
CHI
2004
ACM
16 years 6 months ago
Automatic support for web user studies with SCONE and TEA
This paper describes the concepts of TEA, a flexible tool that supports user tests by automating repetitive tasks and collecting data of user inputs and actions. TEA was specifica...
Hartmut Obendorf, Harald Weinreich, Torsten Hass
« Prev « First page 1218 / 1410 Last » Next »