1563 search results - page 266 / 313 » Flexible instruction processors |
144
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
Increasing dynamic variability with technology scaling has made it essential to incorporate large design-time timing margins to ensure yield and reliable operation. Online techniq...
150
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
157
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
171
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WORDS
2002
IEEE
15 years 11 months ago
2002
IEEE
The Worst-Case Execution-Time Analysis (WCET Analysis) of program code that is to be executed on modern processors is a highly complex task. First, it involves path analysis, to i...
193
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HPCA
2000
IEEE
15 years 10 months ago
2000
IEEE
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...