1563 search results - page 239 / 313 » Flexible instruction processors |
155
click to vote
ISCA
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper describes the polymorphous TRIPS architecture which can be configured for different granularities and types of parallelism. TRIPS contains mechanisms that enable the p...
176
click to vote
RTAS
2003
IEEE
15 years 11 months ago
2003
IEEE
This paper investigates how dynamic branch prediction in a microprocessor affects the predictability of execution time for software running on that processor. By means of experim...
163
click to vote
ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
155
click to vote
CODES
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...
198
click to vote
ISQED
2002
IEEE
15 years 11 months ago
2002
IEEE
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...