1563 search results - page 237 / 313 » Flexible instruction processors |
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ARITH
2007
IEEE
16 years 21 days ago
2007
IEEE
The floating-point multiply-add fused (MAF) unit sets a new trend in the processor design to speed up floatingpoint performance in scientific and multimedia applications. This ...
142
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DATE
2006
IEEE
16 years 12 days ago
2006
IEEE
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
150
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DATE
2006
IEEE
16 years 12 days ago
2006
IEEE
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
152
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HICSS
2006
IEEE
16 years 12 days ago
2006
IEEE
— Software protection is increasingly necessary for uses in commercial systems, digital content distributors, and military systems. The Secure Software (SecSoft) architecture is ...
163
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MICRO
2006
IEEE
16 years 10 days ago
2006
IEEE
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...