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ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
16 years 24 days ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...
MICRO
2006
IEEE
100views Hardware» more  MICRO 2006»
16 years 12 days ago
Serialization-Aware Mini-Graphs: Performance with Fewer Resources
Instruction aggregation—the grouping of multiple operations into a single processing unit—is a technique that has recently been used to amplify the bandwidth and capacity of c...
Anne Bracy, Amir Roth
APCSAC
2005
IEEE
16 years 9 hour ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
LCTRTS
2005
Springer
15 years 12 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
CGO
2003
IEEE
15 years 11 months ago
Phi-Predication for Light-Weight If-Conversion
Predicated execution can eliminate hard to predict branches and help to enable instruction level parallelism. Many current predication variants exist where the result update is co...
Weihaw Chuang, Brad Calder, Jeanne Ferrante