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CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 10 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
ISLPED
1997
ACM
108views Hardware» more  ISLPED 1997»
15 years 10 months ago
Techniques for low energy software
The energy consumption of a system depends upon the hardware and software component of a system. Since it is the software which drives the hardware in most systems, decisions take...
Huzefa Mehta, Robert Michael Owens, Mary Jane Irwi...
LCN
2005
IEEE
15 years 12 months ago
AntiWorm NPU-based Parallel Bloom Filters for TCP/IP Content Processing in Giga-Ethernet LAN
—TCP/IP protocol suite carries most application data in Internet. TCP flow retrieval has more security meanings than the IP packet payload. Hence, monitoring the TCP flow has mor...
Zhen Chen, Chuang Lin, Jia Ni, Dong-Hua Ruan, Bo Z...
MICRO
2000
IEEE
129views Hardware» more  MICRO 2000»
15 years 6 months ago
Architectural Considerations for CPU and Network Interface Integration
The popularity of the Internet and the emergence of broadband access networks is fueling the development of communications processors -- devices that integrate processing, network...
Charles D. Cranor, R. Gopalakrishnan, Peter Z. Onu...
DAC
2006
ACM
16 years 7 months ago
Shielding against design flaws with field repairable control logic
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
Ilya Wagner, Valeria Bertacco, Todd M. Austin