1563 search results - page 203 / 313 » Flexible instruction processors |
208
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ASPLOS
2000
ACM
15 years 10 months ago
2000
ACM
This paper presents the first analysis of operating system execution on a simultaneous multithreaded (SMT) processor. While SMT has been studied extensively over the past 6 years,...
198
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TCAD
2008
15 years 6 months ago
2008
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
151
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ICCD
2001
IEEE
16 years 3 months ago
2001
IEEE
The general-purpose precise interrupt mechanism, which has long been used to handle exceptional conditions that occur infrequently, is now being used increasingly often to handle ...
180
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CP
2009
Springer
15 years 9 months ago
2009
Springer
Abstract. This paper considers the automatic generation of architectural tests (ATGP), a fundamental problem in processor validation. ATGPs are complex conditional constraint satis...
213
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ISCAPDCS
2004
15 years 7 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...