1563 search results - page 195 / 313 » Flexible instruction processors |
200
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MICRO
2010
IEEE
15 years 4 months ago
2010
IEEE
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
173
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TCAD
2010
15 years 1 months ago
2010
The last decade has witnessed the emergence of the application-specific instruction-set processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user ...
155
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VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
175
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EUROPAR
2009
Springer
16 years 29 days ago
2009
Springer
An upgrade from dual-core to quad-core AMD processor on the Cray XT system at the Oak Ridge National Laboratory (ORNL) Leadership Computing Facility (LCF) has resulted in significa...
157
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APCSAC
2006
IEEE
16 years 14 days ago
2006
IEEE
Abstract. Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affe...