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CASES
2003
ACM
15 years 11 months ago
Compiler optimization and ordering effects on VLIW code compression
Code size has always been an important issue for all embedded applications as well as larger systems. Code compression techniques have been devised as a way of battling bloated co...
Montserrat Ros, Peter Sutton
MICRO
1999
IEEE
109views Hardware» more  MICRO 1999»
15 years 10 months ago
Compiler-Directed Dynamic Computation Reuse: Rationale and Initial Results
Recent studies on value locality reveal that many instructions are frequently executed with a small variety of inputs. This paper proposes an approach that integrates architecture...
Daniel A. Connors, Wen-mei W. Hwu
CGO
2004
IEEE
15 years 10 months ago
Software-Controlled Operand-Gating
Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method fo...
Ramon Canal, Antonio González, James E. Smi...
CC
2006
Springer
101views System Software» more  CC 2006»
15 years 10 months ago
SARA: Combining Stack Allocation and Register Allocation
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...
V. Krishna Nandivada, Jens Palsberg
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
15 years 10 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels