1563 search results - page 184 / 313 » Flexible instruction processors |
136
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MICRO
2003
IEEE
15 years 11 months ago
2003
IEEE
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
159
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ISSS
1999
IEEE
15 years 10 months ago
1999
IEEE
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
175
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DSN
2005
IEEE
15 years 8 months ago
2005
IEEE
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
169
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ISCA
2003
IEEE
15 years 11 months ago
2003
IEEE
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
175
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MICRO
2003
IEEE
15 years 11 months ago
2003
IEEE
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...