Sciweavers

1563 search results - page 182 / 313
» Flexible instruction processors
Sort
View
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 10 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
16 years 16 hour ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
GIS
2006
ACM
16 years 7 months ago
Efficient GML-native processors for web-based GIS: techniques and tools
Geography Markup Language (GML) is an XML-based language for the markup, storage, and exchange of geospatial data. It provides a rich geospatial vocabulary and allows flexible doc...
Chia-Hsin Huang, Tyng-Ruey Chuang, Dong-Po Deng, H...
CASES
2004
ACM
15 years 10 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany
ASPLOS
2008
ACM
15 years 8 months ago
Streamware: programming general-purpose multicore processors using streams
Recently, the number of cores on general-purpose processors has been increasing rapidly. Using conventional programming models, it is challenging to effectively exploit these core...
Jayanth Gummaraju, Joel Coburn, Yoshio Turner, Men...