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DATE
2010
IEEE
156views Hardware» more  DATE 2010»
15 years 11 months ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
15 years 10 months ago
Impact of Sharing-Based Thread Placement on Multithreaded Architectures
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
Radhika Thekkath, Susan J. Eggers
ENTCS
2008
142views more  ENTCS 2008»
15 years 6 months ago
Worst Case Reaction Time Analysis of Concurrent Reactive Programs
Reactive programs have to react continuously to their inputs. Here the time needed to react with the according output is important. While the synchrony hypothesis takes the view t...
Marian Boldt, Claus Traulsen, Reinhard von Hanxled...
JSA
2008
74views more  JSA 2008»
15 years 6 months ago
Resource conflict detection in simulation of function unit pipelines
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
Pekka Jääskeläinen, Vladimír...
ET
2008
92views more  ET 2008»
15 years 6 months ago
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...