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PLDI
2005
ACM
16 years 5 hour ago
Code placement for improving dynamic branch prediction accuracy
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
Daniel A. Jiménez
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
15 years 10 months ago
Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
David I. August, Daniel A. Connors, Scott A. Mahlk...
ARCS
2006
Springer
15 years 10 months ago
Microcode with Embedded Timing Constraints
: Watchdogs are a well-known and widespread means to increase the safety of microprocessors. The programmer or the compiler must insert instructions to reset the watchdog. If the p...
Bernhard Fechner
ICIP
2000
IEEE
16 years 8 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
DAC
2007
ACM
16 years 7 months ago
Hardware Support for Secure Processing in Embedded Systems
The inherent limitations of embedded systems make them particularly vulnerable to attacks. We have developed a hardware monitor that operates in parallel to the embedded processor...
Shufu Mao, Tilman Wolf