1563 search results - page 175 / 313 » Flexible instruction processors |
175
click to vote
ISCAS
2005
IEEE
16 years 1 days ago
2005
IEEE
— Architectures based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance levels in mobile devices. The effectiveness ...
185
click to vote
ASPDAC
2004
ACM
15 years 12 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
159
click to vote
WMPI
2004
ACM
15 years 12 months ago
2004
ACM
Clustered microarchitectures are an effective organization to deal with the problem of wire delays and complexity by partitioning some of the processor resources. The organization ...
146
click to vote
ISCA
2003
IEEE
15 years 11 months ago
2003
IEEE
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
187
click to vote
ISCA
2000
IEEE
15 years 10 months ago
2000
IEEE
Trace caches enable high bandwidth, low latency instruction supply, but have a high miss penalty and relatively large working sets. Consequently, their performance may suffer due ...