1563 search results - page 174 / 313 » Flexible instruction processors |
133
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CORR
2010
Springer
15 years 3 months ago
2010
Springer
We address the problems of estimating the computer efficiency and the computer capacity. We define the computer efficiency and capacity and suggest a method for their estimation, ...
160
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HPCA
2006
IEEE
16 years 6 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
152
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HPCA
2004
IEEE
16 years 6 months ago
2004
IEEE
Branch misprediction penalty consists of two components: the time wasted on mis-speculative execution until the mispredicted branch is resolved and the time to restart the pipelin...
162
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ICESS
2007
Springer
16 years 18 days ago
2007
Springer
In an embedded system including a base processor integrated with a tightly coupled accelerator, extracting frequently executed portions of the code (hot portion) and executing thei...
189
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CASES
2006
ACM
16 years 13 days ago
2006
ACM
In this paper, we propose a fully automatic dynamic scratchpad memory (SPM) management technique for instructions. Our technique loads required code segments into the SPM on deman...