1563 search results - page 173 / 313 » Flexible instruction processors |
178
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CLUSTER
2007
IEEE
16 years 24 days ago
2007
IEEE
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
180
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HPCA
2001
IEEE
16 years 6 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
240
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ISCA
2000
IEEE
15 years 10 months ago
2000
IEEE
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
161
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DAC
1996
ACM
15 years 10 months ago
1996
ACM
Burch and Dill [3] described an automatic method for verifying a pipelined processor against its instruction setarchitecture(ISA). We describethree techniquesfor improving this me...
166
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FUIN
2007
15 years 6 months ago
2007
We present the development of a theory of stored threads and their execution. The work builds upon Maurer’s theory of computer instructions and the thread algebra of Bergstra et ...