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CODES
2008
IEEE
15 years 6 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
ICDE
2006
IEEE
206views Database» more  ICDE 2006»
16 years 7 months ago
Query Co-Processing on Commodity Hardware
The rapid increase in the data volumes for the past few decades has intensified the need for high processing power for database and data mining applications. Researchers have acti...
Anastassia Ailamaki, Naga K. Govindaraju, Dinesh M...
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
15 years 11 months ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier"
In this Paper, we describe the various low power techniques for mobile application SoCs based on the integrated platform "UniPhier". To minimize SoC power dissipation, h...
Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasa...
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
15 years 10 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...