1563 search results - page 140 / 313 » Flexible instruction processors |
173
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HIPEAC
2005
Springer
16 years 23 hour ago
2005
Springer
Abstract. High end routers are targeted at providing worst case throughput guarantees over latency. Caches on the other hand are meant to help latency not throughput in a tradition...
154
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ARCS
2004
Springer
15 years 12 months ago
2004
Springer
Cryptographic methods are widely used within networking and digital rights management. Numerous algorithms exist, e.g. spanning VPNs or distributing sensitive data over a shared ne...
175
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ARCS
2010
Springer
16 years 1 months ago
2010
Springer
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
150
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DSD
2008
IEEE
16 years 29 days ago
2008
IEEE
While shrinking geometries of embedded LSI devices is beneficial for portable intelligent systems, it is increasingly susceptible to influences from electrical noise, process vari...
159
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RTSS
2008
IEEE
16 years 27 days ago
2008
IEEE
Many embedded systems are subject to temporal constraints that require advance guarantees on meeting deadlines. Such systems rely on static analysis to safely bound worst-case exe...