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ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
Yazhuo Dong, Yong Dou
CCGRID
2004
IEEE
15 years 10 months ago
The virtual resource manager: an architecture for SLA-aware resource management
The next generation Grid will demand the Grid middleware to provide flexibility, transparency, and reliability. This implies the appliance of service level agreements to guarantee...
Lars-Olof Burchard, Matthias Hovestadt, Odej Kao, ...
APSEC
2006
IEEE
15 years 10 months ago
Towards a Model-driven Approach to Develop Applications based on Physical Active Objects
The increasing diffusion of ubiquitous communication infrastructures and physical active objects --like sensors and smart tags-- is motivating the integration of these devices int...
Luciano Baresi, Paolo Beretta, Roberto Fraccapani,...
ASAP
2006
IEEE
138views Hardware» more  ASAP 2006»
15 years 10 months ago
Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation
Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates. This paper pr...
Marjan Karkooti, Predrag Radosavljevic, Joseph R. ...
ICFEM
2000
Springer
15 years 10 months ago
Fragmented Retrenchment, Concurrency and Fairness
Retrenchment is presented in a simple relational framework as a more flexible development concept than refinement for capturing the early preformal stages of development, and brie...
Richard Banach, Michael Poppleton