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FM
2009
Springer
169views Formal Methods» more  FM 2009»
15 years 10 months ago
Model Checking Linearizability via Refinement
Abstract. Linearizability is an important correctness criterion for implementations of concurrent objects. Automatic checking of linearizability is challenging because it requires ...
Yang Liu 0003, Wei Chen, Yanhong A. Liu, Jun Sun 0...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
15 years 10 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
FORMATS
2006
Springer
15 years 10 months ago
Temporal Logic Verification Using Simulation
In this paper, we consider a novel approach to the temporal logic verification problem of continuous dynamical systems. Our methodology has the distinctive feature that enables the...
Georgios E. Fainekos, Antoine Girard, George J. Pa...
FSTTCS
2006
Springer
15 years 10 months ago
Branching Pushdown Tree Automata
We observe that pushdown tree automata (PTAs) known in the literature cannot express combinations of branching and pushdown properties. This is because a PTA processes the children...
Rajeev Alur, Swarat Chaudhuri
ISSTA
2000
ACM
15 years 10 months ago
Verifying properties of process definitions
ions for concise and precise specification of such control, but balance this with visualization support to help users also obtain intuitive insights. The underlying complexhese con...
Jamieson M. Cobleigh, Lori A. Clarke, Leon J. Oste...