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ICCD
2004
IEEE
113views Hardware» more  ICCD 2004»
16 years 3 months ago
Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems
Abstract - This paper describes a communicationcentric design methodology that addresses the fundamental challenges induced by the emergence of truly heterogeneous Systems-on-Chip ...
Radu Marculescu, Diana Marculescu, Larry T. Pilegg...
SIROCCO
2007
15 years 7 months ago
Design of Minimal Fault Tolerant On-Board Networks: Practical Constructions
Abstract. The problem we consider originates from the design of efficient on-board networks in satellites (also called Traveling Wave Tube Amplifiers). Signals incoming in the net...
Jean-Claude Bermond, Frédéric Giroir...
DATE
2008
IEEE
119views Hardware» more  DATE 2008»
16 years 18 days ago
Guiding Circuit Level Fault-Tolerance Design with Statistical Methods
In the last decade, the focus of fault-tolerance methods has tended towards circuit level modifications, such as transistor resizing, and away from expensive system level redunda...
Drew C. Ness, David J. Lilja
ISCIS
2003
Springer
15 years 11 months ago
Design and Implementation of a Secure Group Communication Protocol on a Fault Tolerant Ring
In this paper, we describe a secure group communication protocol for a fault-tolerant synchronous ring. Our protocol, named Secure Synchronous Ring Protocol (SSRP), integrates a se...
Özgür Saglam, Mehmet E. Dalkilç, ...
FLAIRS
2001
15 years 7 months ago
A Binary Tree Based Approach for the Design of Fault-Tolerant Robot Team
Taskallocation andload balancingare critical in faulttolerant robotic teamdesign.Thispaperdeals withthe problemsof allocating andreallocatingtasks to multiple robotsin a fault-tol...
Haihang Sun, Robert McCartney