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ICCAD
2003
IEEE
120views Hardware» more  ICCAD 2003»
16 years 3 months ago
RTL Power Optimization with Gate-Level Accuracy
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
Qi Wang, Sumit Roy
TACAS
2010
Springer
191views Algorithms» more  TACAS 2010»
16 years 1 months ago
Blocked Clause Elimination
Boolean satisfiability (SAT) and its extensions are becoming a core technology for the analysis of systems. The SAT-based approach divides into three steps: encoding, preprocessin...
Matti Järvisalo, Armin Biere, Marijn Heule
DAC
2009
ACM
16 years 1 months ago
Variational capacitance extraction of on-chip interconnects based on continuous surface model
In this paper we present a continuous surface model to describe the interconnect geometric variation, which improves the currently used model for better accuracy while not increas...
Wenjian Yu, Chao Hu, Wangyang Zhang
CEC
2009
IEEE
16 years 1 months ago
The Pareto-Following Variation Operator as an alternative approximation model
— This paper presents a critical analysis of the Pareto-Following Variation Operator (PFVO) when used as an approximation method for Multiobjective Evolutionary Algorithms (MOEA)...
A. K. M. Khaled Ahsan Talukder, Michael Kirley, Ra...
CEC
2009
IEEE
16 years 1 months ago
Evolving modular neural-networks through exaptation
— Despite their success as optimization methods, evolutionary algorithms face many difficulties to design artifacts with complex structures. According to paleontologists, living...
Jean-Baptiste Mouret, Stéphane Doncieux