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FCCM
2002
IEEE
208views VLSI» more  FCCM 2002»
15 years 11 months ago
The Effects of Datapath Placement and C-Slow Retiming on Three Computational Benchmarks
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
Nicholas Weaver, John Wawrzynek
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
15 years 11 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...