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EIT
2009
IEEE
16 years 1 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover
OSS
2009
Springer
16 years 28 days ago
Estimating Commit Sizes Efficiently
The quantitative analysis of software projects can provide insights that let us better understand open source and other software development projects. An important variable used in...
Philipp Hofmann, Dirk Riehle
SIES
2007
IEEE
16 years 20 days ago
Design Space Exploration with Evolutionary Multi-Objective Optimisation
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
Martin Holzer 0002, Bastian Knerr, Markus Rupp
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
16 years 12 days ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
VTS
2006
IEEE
98views Hardware» more  VTS 2006»
16 years 11 days ago
Iterative OPDD Based Signal Probability Calculation
This paper presents an improved method to accurately estimate signal probabilities using ordered partial decision diagrams (OPDDs) [Kodavarti 93] for partial representation of the...
Avijit Dutta, Nur A. Touba