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ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
16 years 3 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
16 years 24 days ago
Fast Analog Circuit Synthesis Using Sensitivity Based Near Neighbor Searches
We present an efficient analog synthesis algorithm employing regression models of circuit matrices. Circuit matrix models achieve accurate and speedy synthesis of analog circuits...
Almitra Pradhan, Ranga Vemuri
GLOBECOM
2006
IEEE
16 years 11 days ago
Fast Stochastic Analysis of P2P File Distribution Architectures
— In this paper we investigate which is the most efficient architecture and protocol that can be used for file distribution. The focus of the analysis is to understand not only...
Damiano Carra, Renato Lo Cigno, Ernst W. Biersack
VLSID
2006
IEEE
143views VLSI» more  VLSID 2006»
16 years 10 days ago
Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems
This paper presents Frame Based Fair Multiprocessor Scheduler (FBFMS) which provides accurate real-time proportional fair scheduling for a set of dynamic tasks on a symmetric mult...
Arnab Sarkar, P. P. Chakrabarti, Rajeev Kumar
DATE
2005
IEEE
117views Hardware» more  DATE 2005»
15 years 12 months ago
A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs
As technology scales down, the static power is expected to become a significant fraction of the total power. The exponential dependence of static power with the operating temperat...
José Luis Rosselló, Vicens Canals, S...