541 search results - page 49 / 109 » Factoring Solution Sets of Polynomial Systems in Parallel |
163
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INFOCOM
2000
IEEE
15 years 10 months ago
2000
IEEE
Abstract—We study a network model in which each network link is associated with a set of delays and costs. These costs are a function of the delays and reflect the prices paid i...
206
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EDOC
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper presents an approach for embodying nonfunctional requirements (NFRs) into software architecture using architectural tactics. Architectural tactics are reusable architec...
159
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IEEEPACT
2006
IEEE
16 years 6 days ago
2006
IEEE
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
168
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INFOCOM
2002
IEEE
15 years 11 months ago
2002
IEEE
—A Virtual Private Network (VPN) aims to emulate the services provided by a private network over the shared Internet. The endpoints of e connected using abstractions such as Virt...
169
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JCO
2011
15 years 1 months ago
2011
Discrete gate sizing is a critical optimization in VLSI circuit design. Given a set of available gate sizes, discrete gate sizing problem asks to assign a size to each gate such th...