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    FPT
    2005
    IEEE
    163views Hardware» more  FPT 2005»
    Designing an FPGA SoC Using a Standardized IP Block Interface
    16 years 6 days ago
    Designing an FPGA SoC Using a Standardized IP Block Interface
    Download  www.ensc.sfu.ca
    Designing Systems on-Chip is becoming increasingly popular as die sizes increase and technology sizes decrease. The complexity of integrating different types of Processing Element...
    Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
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    FPT
    2005
    IEEE
    132views Hardware» more  FPT 2005»
    Accelerating FPGA Routing Using Architecture-Adaptive A* Techniques
    16 years 6 days ago
    Accelerating FPGA Routing Using Architecture-Adaptive A* Techniques
    Download  www.ee.washington.edu
    Akshay Sharma, Scott Hauck
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    IPPS
    2005
    IEEE
    101views Distributed And Parallel Com...» more  IPPS 2005»
    FPGA Implementations of the Massively Parallel GCA Model
    16 years 6 days ago
    FPGA Implementations of the Massively Parallel GCA Model
    Download  www.ra.informatik.tu-darmstadt.de
    Wolfgang Heenes, Rolf Hoffmann, Sebastian Kanthak
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    ARCS
    2005
    Springer
    148views Software Engineering» more  ARCS 2005»
    An FPGA Dynamically Reconfigurable Framework for Modular Robotics
    16 years 4 days ago
    An FPGA Dynamically Reconfigurable Framework for Modular Robotics
    Download  lslwww.epfl.ch
    Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
    Andres Upegui, Rico Moeckel, Elmar Dittrich, Auke ...
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    FPL
    2005
    Springer
    172views Hardware» more  FPL 2005»
    An FPGA Network Architecture for Accelerating 3DES - CBC
    16 years 4 days ago
    An FPGA Network Architecture for Accelerating 3DES - CBC
    Download  www.itee.uq.edu.au
    This paper presents a DES/3DES core that will support Cipher Block Chaining (CBC) and also has a built in keygen that together take up about 10% of the resources in a Xilinx Virte...
    Chin Mun Wee, Peter R. Sutton, Neil W. Bergmann
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