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FCCM
2004
IEEE
141views VLSI» more  FCCM 2004»
15 years 9 months ago
Deep Packet Filter with Dedicated Logic and Read Only Memories
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
Young H. Cho, William H. Mangione-Smith
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
16 years 5 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
FPL
2005
Springer
226views Hardware» more  FPL 2005»
15 years 11 months ago
A Parallel MPEG-4 Encoder for FPGA Based Multiprocessor SoC
A parallel MPEG-4 Simple Profile encoder for FPGA based multiprocessor System-on-Chip (SOC) is presented. The goal is a computationally scalable framework independent of platform....
Olli Lehtoranta, Erno Salminen, Ari Kulmala, Marko...
DFT
2002
IEEE
127views VLSI» more  DFT 2002»
15 years 11 months ago
A New Functional Fault Model for FPGA Application-Oriented Testing
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo ...
ERSA
2004
129views Hardware» more  ERSA 2004»
15 years 7 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna