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ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
16 years 4 days ago
Analysis and optimization of gate leakage current of power gating circuits
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...
Hyung-Ock Kim, Youngsoo Shin
ISCAS
2002
IEEE
91views Hardware» more  ISCAS 2002»
15 years 11 months ago
Charge-based MOS correlated double sampling comparator and folding circuit
A novel charge-based comparator and folding circuit are presented. Correlated double sampling comparison is performed using a log-domain integrator, implemented by a subthreshold ...
Roman Genov, Gert Cauwenberghs
IJCNN
2000
IEEE
15 years 10 months ago
Hardware Implementation of a PCA Learning Network by an Asynchronous PDM Digital Circuit
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
Yuzo Hirai, Kuninori Nishizawa
DAC
2000
ACM
15 years 10 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
BIBE
2008
IEEE
16 years 19 days ago
Robust parameter identification for biological circuit calibration
Abstract-The aim of this work is to compare some deterministic optimization algorithms and evolutionary algorithms on parameter estimation in a biological circuit design problem: t...
Giuseppe Nicosia, Eva Sciacca