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HIPEAC
2005
Springer
16 years 8 days ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
182
Voted
EUROMICRO
2000
IEEE
15 years 11 months ago
Continuous Discrete-Event Simulation of a Continuous-Media Server I/O Subsystem
When designing computer systems, simulation tools are used to imitate a real or proposed system. Complex, dynamic systems can be simulated without the cost and time constraints in...
Michael Weeks, Chris Bailey, Reza Sotudeh
ARCS
2006
Springer
15 years 10 months ago
Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology
: We have shown in our past work that the standard configuration of Time-Triggered (TT) Ethernet unifies real-time and non-real-time traffic within a single coherent communication ...
Astrit Ademaj, Hermann Kopetz, Petr Grillinger, Kl...
CASES
2001
ACM
15 years 10 months ago
The very portable optimizer for digital signal processors
Although retargetability has been a major design concern for many compilers, retargetability is a vitally important issue for Digital Signal Processors(DSPs) because the architect...
Sungjoon Jung, Yunheung Paek
LCPC
1995
Springer
15 years 10 months ago
V-cal: A Calculus for the Compilation of Data Parallel Languages
V-cal is a calculus designed to support the compilation of data parallel languages that allows to describe program transformations and optimizations as semantics preserving rewrite...
P. F. G. Dechering, J. A. Trescher, J. P. M. de Vr...