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190
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
154
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
The relative decline of single-threaded processor performance, coupled with the ongoing shift towards on chip parallelism requires that CAD applications run efficiently on paralle...
168
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DAC
2003
ACM
16 years 7 months ago
2003
ACM
SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
164
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ICCD
2006
IEEE
16 years 3 months ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
158
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IPPS
2007
IEEE
16 years 1 months ago
2007
IEEE
Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued perform...