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DATE
2009
IEEE
115views Hardware» more  DATE 2009»
15 years 10 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
DAWAK
2010
Springer
15 years 6 months ago
Physical Design and Implementation of Spatial Data Warehouses Supporting Continuous Fields
Abstract. Although many proposals exist for extending Geographic Information Systems (GIS) with OLAP and data warehousing capabilities (a topic denoted SOLAP), only recently the im...
Leticia I. Gómez, Alejandro A. Vaisman, Est...
ICSE
2008
IEEE-ACM
16 years 6 months ago
VieDAME - flexible and robust BPEL processes through monitoring and adaptation
VieDAME is a tool for monitoring and dynamic service adaptation of BPEL processes. The tool monitors partner service interaction to compute Quality of Service (QoS) data and perfo...
Oliver Moser, Florian Rosenberg, Schahram Dustdar
SAC
2006
ACM
16 years 17 days ago
A UML 2-compatible language and tool for formal modeling real-time system architectures
ArchiTRIO is a formal language, which complements UML 2.0 concepts with a formal, logic-based notation that allows users to state system-wide properties, both static and dynamic, ...
Pietro Colombo, Matteo Pradella, Matteo Rossi
SIPS
2006
IEEE
16 years 19 days ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...