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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
SECON
2008
IEEE
16 years 15 days ago
Enhancing the Data Collection Rate of Tree-Based Aggregation in Wireless Sensor Networks
— What is the fastest rate at which we can collect a stream of aggregated data from a set of wireless sensors organized as a tree? We explore a hierarchy of techniques using real...
Özlem Durmaz Incel, Bhaskar Krishnamachari
COMPSAC
2002
IEEE
15 years 11 months ago
Design and Implementation of a Network Application Architecture for Thin Clients
This paper explores the issues and the techniques of enabling multimedia applications for the thin client computing. A prototype of a video communication system based on H.323 fam...
Chia-Chen Kuo, Ping Ting, Ming-Syan Chen, Jeng-Chu...
CAL
2008
15 years 6 months ago
BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
I. Walter, Israel Cidon, Avinoam Kolodny
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
15 years 4 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung