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DAC
2009
ACM
16 years 7 months ago
A fully polynomial time approximation scheme for timing driven minimum cost buffer insertion
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
Shiyan Hu, Zhuo Li, Charles J. Alpert
DAC
2008
ACM
16 years 7 months ago
ADAM: run-time agent-based distributed application mapping for on-chip communication
Design-time decisions can often only cover certain scenarios and fail in efficiency when hard-to-predict system scenarios occur. This drives the development of run-time adaptive s...
Jörg Henkel, Mohammad Abdullah Al Faruque, Ru...
DAC
2000
ACM
16 years 7 months ago
Can recursive bisection alone produce routable placements?
This work focuses on congestion-driven placement of standard cells into rows in the fixed-die context. We summarize the stateof-the-art after two decades of research in recursive ...
Andrew E. Caldwell, Andrew B. Kahng, Igor L. Marko...
DAC
2002
ACM
16 years 7 months ago
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao ...
DAC
2004
ACM
16 years 7 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
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