774 search results - page 79 / 155 » Experiences of low power design implementation and verificat... |
139
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ISCAS
2008
IEEE
16 years 18 days ago
2008
IEEE
—This paper presents three techniques to reduce the power consumption in ternary content-addressable memories (TCAMs). The first technique is to use newly developed monolithical...
158
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
132
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ITC
2002
IEEE
15 years 11 months ago
2002
IEEE
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
116
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CORR
2008
Springer
15 years 6 months ago
2008
Springer
: This paper presents several design issues related to the monolithic integration of a 3-phase AC to DC low voltage, low power rectifier for 3-phase micro source electrical conditi...
149
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ATAL
2008
Springer
15 years 8 months ago
2008
Springer
The implementation of software systems with large numbers of heterogeneous components calls for a powerful design methodology. Although several such methodologies have been propos...