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CGO
2004
IEEE
15 years 10 months ago
Optimizing Translation Out of SSA Using Renaming Constraints
Static Single Assignment form is an intermediate representation that uses instructions to merge values at each confluent point of the control flow graph. instructions are not ma...
Fabrice Rastello, François de Ferriè...
CODES
2004
IEEE
15 years 10 months ago
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Hyunuk Jung, Soonhoi Ha
DAC
2004
ACM
15 years 10 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
CODES
2006
IEEE
15 years 10 months ago
Increasing hardware efficiency with multifunction loop accelerators
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
CODES
2006
IEEE
15 years 10 months ago
Application specific forwarding network and instruction encoding for multi-pipe ASIPs
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswar...