7781 search results - page 310 / 1557 » Experience Design |
338
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GLVLSI
2011
IEEE
14 years 10 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
176
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
195
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DAC
2001
ACM
16 years 7 months ago
2001
ACM
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
188
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AUTOMOTIVEUI
2009
ACM
16 years 1 months ago
2009
ACM
Over the last 100 years it has become much easier to operate a car. However in recent years the number of functions a user can control while driving has greatly increased. Infotai...
197
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CISS
2008
IEEE
16 years 1 months ago
2008
IEEE
—Magnetic resonance imaging (MRI) may be viewed as a two-stage experiment that yields a non-invasive spatial mapping of hydrogen nuclei in living subjects. Nuclear spins within a...