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ISQED
2007
IEEE
114views Hardware» more  ISQED 2007»
16 years 1 months ago
Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure
Design verification has become a bottleneck of modern designs. Recently, simulation-based random verification has attracted a lot of interests due to its effectiveness in uncoveri...
Yu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Ch...
IWPC
2002
IEEE
15 years 11 months ago
Theory-based Analysis of Cognitive Support in Software Comprehension Tools
Past research on software comprehension tools has produced a wealth of lessons in building good tools. However our explanations of these tools tends to be weakly grounded in exist...
Andrew Walenstein
WCRE
2002
IEEE
15 years 11 months ago
Relating Expectations to Automatically Recovered Design Patterns
At MITRE we are developing tools to aid analysts in assessing the operational usability and quality of object-oriented code. Our tools statically examine source code, automaticall...
Angel Asencio, Sam Cardman, David Harris, Ellen La...
ICECCS
2002
IEEE
93views Hardware» more  ICECCS 2002»
15 years 12 months ago
Mnemosyne: Designing and Implementing Network Short-Term Memory
Network traffic logs play an important role in incident analysis. With the increasing throughput of network links, maintaining a complete log of all network activity has become a...
Giovanni Vigna, Andrew Mitchel
DELTA
2006
IEEE
16 years 28 days ago
Some Common Aspects of Design Validation, Debug and Diagnosis
— Design, Verification and Test of integrated circuits with millions of gates put strong requirements on design time, test volume, test application time, test speed and diagnost...
Talal Arnaout, Gunter Bartsch, Hans-Joachim Wunder...