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ISCAS
2005
IEEE
156views Hardware» more  ISCAS 2005»
16 years 6 days ago
Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000
—JPEG2000 image compression standard is designed to cater the needs of a large span of applications including numerous consumer products. However, its use is still restricted due...
Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubm...
ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
16 years 6 days ago
Energy and latency evaluation of NoC topologies
Abstract — Mapping applications onto different networks-onchip (NoCs) topologies is done by mapping processing cores on local ports of routers considering requirements like laten...
Márcio Eduardo Kreutz, César A. M. M...
ISM
2005
IEEE
212views Multimedia» more  ISM 2005»
16 years 6 days ago
Neural Network Based Framework For Goal Event Detection In Soccer Videos
In this paper, a neural network based framework for semantic event detection in soccer videos is proposed. The framework provides a robust solution for soccer goal event detection...
Kasun Wickramaratna, Min Chen, Shu-Ching Chen, Mei...
MICRO
2005
IEEE
117views Hardware» more  MICRO 2005»
16 years 6 days ago
A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation
Recent experimental advances have demonstrated technologies capable of supporting scalable quantum computation. A critical next step is how to put those technologies together into...
Tzvetan S. Metodi, Darshan D. Thaker, Andrew W. Cr...
RTSS
2005
IEEE
16 years 6 days ago
Decentralized Utilization Control in Distributed Real-Time Systems
Many real-time systems must control their CPU utilizations in order to meet end-to-end deadlines and prevent overload. Utilization control is particularly challenging in distribut...
Xiaorui Wang, Dong Jia, Chenyang Lu, Xenofon D. Ko...
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