3893 search results - page 553 / 779 » Execution Architectures and Compilation |
165
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DAC
2000
ACM
16 years 7 months ago
2000
ACM
We have developed a function-level power estimation methodology for predicting the power dissipation of embedded software. For a given microprocessor core, we empirically build th...
196
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...
322
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ASPLOS
2009
ACM
16 years 7 months ago
2009
ACM
QR decomposition is a computationally intensive linear algebra operation that factors a matrix A into the product of a unitary matrix Q and upper triangular matrix R. Adaptive sys...
179
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VLSID
2009
IEEE
16 years 7 months ago
2009
IEEE
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...
157
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HPCA
2007
IEEE
16 years 7 months ago
2007
IEEE
A thread executing on a simultaneous multithreading (SMT) processor that experiences a long-latency load will eventually stall while holding execution resources. Existing long-lat...