3893 search results - page 397 / 779 » Execution Architectures and Compilation |
221
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ISCA
2012
IEEE
13 years 9 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
197
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HIPEAC
2005
Springer
16 years 9 days ago
2005
Springer
We present and evaluate the TILA-rin GPU microarchitecture for embedded systems using the ATTILA GPU simulation framework. We use a trace from an execution of the Unreal Tournament...
210
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DSN
2003
IEEE
16 years 2 days ago
2003
IEEE
Our goal is to automatically obtain a distributed and fault-tolerant embedded system: distributed because the system must run on a distributed architecture; fault-tolerant because...
154
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HPCA
2008
IEEE
16 years 7 months ago
2008
IEEE
Serializing instructions (SIs), such as writes to control registers, have many complex dependencies, and are difficult to execute out-of-order (OoO). To avoid unnecessary complexi...
180
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INDIASE
2009
ACM
16 years 1 months ago
2009
ACM
When trying to reverse engineer software, execution trace analysis is increasingly used. Though, by using this technique we are quickly faced with an enormous amount of data that ...