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CF
2006
ACM
16 years 22 days ago
Dynamic thread assignment on heterogeneous multiprocessor architectures
In a multi-programmed computing environment, threads of execution exhibit different runtime characteristics and hardware resource requirements. Not only do the behaviors of distin...
Michela Becchi, Patrick Crowley
SAC
2006
ACM
16 years 22 days ago
On the architectural alignment of ATL and QVT
Transforming models is a critical activity in Model Driven Engineering (MDE). With the expected adoption of the OMG QVT standard for model transformation language it is anticipate...
Frédéric Jouault, Ivan Kurtev
CODES
2005
IEEE
16 years 12 days ago
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs
We present a new scheme for dynamic voltage and frequency scaling (DVS) for processing multimedia streams on architectures with restricted buffer sizes. The main advantage of our ...
Alexander Maxiaguine, Samarjit Chakraborty, Lothar...
ICA3PP
2005
Springer
16 years 8 days ago
GridMD: Program Architecture for Distributed Molecular Simulation
In the present work we describe architectural concepts of the distributed molecular simulation package GridMD. The main purpose of this work is to underline the construction patter...
Ilya Valuev
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
16 years 1 days ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...