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ISPASS
2010
IEEE
16 years 1 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
193
Voted
FAC
2007
128views more  FAC 2007»
15 years 6 months ago
Verifying a signature architecture: a comparative case study
Abstract. We report on a case study in applying different formal methods to model and verify an architecture for administrating digital signatures. The architecture comprises seve...
David A. Basin, Hironobu Kuruma, Kunihiko Miyazaki...
226
Voted
BIBM
2009
IEEE
218views Bioinformatics» more  BIBM 2009»
16 years 1 months ago
Real-Time Non-rigid Registration of Medical Images on a Cooperative Parallel Architecture
Abstract—Unacceptable execution time of Non-rigid registration (NRR) often presents a major obstacle to its routine clinical use. Parallel computing is an effective way to accele...
Yixun Liu, Andriy Fedorov, Ron Kikinis, Nikos Chri...
212
Voted
MICRO
2008
IEEE
114views Hardware» more  MICRO 2008»
16 years 1 months ago
Toward a multicore architecture for real-time ray-tracing
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...
Venkatraman Govindaraju, Peter Djeu, Karthikeyan S...
ISPASS
2007
IEEE
16 years 1 months ago
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...
Wangyuan Zhang, Xin Fu, Tao Li, José A. B. ...