3893 search results - page 372 / 779 » Execution Architectures and Compilation |
131
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ICCD
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper describes a core-customization process of a CISC processor core for a given application program. It aims at the power reduction in the CISC processor core by fully util...
164
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ISCA
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
180
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PPDP
1999
Springer
15 years 11 months ago
1999
Springer
Abstract. Despite extensive theoretical work on process-calculi, virtual machine specifications and implementations of actual computational models are still scarce. This paper pre...
189
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CASES
2007
ACM
15 years 10 months ago
2007
ACM
In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on...
166
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ERSA
2006
15 years 8 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...